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sy88149hal 1.25gbps burst-mode limiting amplifier with ultra-fast signal assert timing micrel inc. 2180 fortune drive san jose, ca 95131 usa tel +1 ( 408 ) 944-0800 fax + 1 (408) 474-1000 http://www.micrel.com july 2011 m9999-072511-a hbwhelp@micrel.com or (408) 955-1690 general description the sy88149hal is a high- sensitivity, burst-mode capable, limiting-post amplifier designed for ftth pon optical line terminal (olt) receiver applications. the sy88149hal satisfies the strict timing restrictions of the gpon standards by providing ultra-fast loss-of-signal (los) or signal-detect (sd) output. auto reset and manual reset options are provided to control los/sd output timing. the device can be connected to burst-mode capable transimpedance amplifiers (tias) using ac or dc coupling. the sy88149hal generates a high-gain lvttl los or sd output. a programmable los/sd level set pin (los/sd lvl ) sets the sensitivity of the input amplitude detection. for increased flex ibility, this device also includes an option to select between los or sd output by using the los/sd sel pin. the los/sd output can be fed back to the jam input to maintain data output stability under an invalid input signal conditions. typically, 3db los/sd hysteresis is provided to prevent chattering. the sy88149hal operates from a single +3.3v power supply, over temperatures ranging from C40 o c to +85 o c. with its wide bandwidth and high gain, signals up to 1.25gbps and as small as 5mvpp can be amplified to lvpecl levels. all support documentation can be found on micrels web site at: www.micrel.com . features ? <5ns sd assert (los deassert) time ? option to auto reset or manual reset los/sd output ? selectable los/sd output option ? high-sensitivity los/sd signal detect ? low-noise lvpecl data outputs ? squelching function to maintain output stability ? programmable los/sd level set (los/sd lvl ) ? 5mvpp input sensitivity ? 1.25gbps operation ? single 3.3v power supply ? available in a 16-pin (3mm 3mm) qfn ? package applications ? ge-pon/gpon ? gigabit ethernet ? fibre channel ? oc-3/12/24 sonet/sdh ? high-gain line driver and line receiver ? low-gain tia interface markets ? ftth pon ? datacom/telecom ? optical transceiver downloaded from: http:///
micrel, inc. sy88149hal july 2011 2 m9999-072511-a hbwhelp@micrel.com ordering information part number package type operating range package marking SY88149HALMG lead-free qfn-16 industrial 149a with pb-free bar-line indicator SY88149HALMG tr (1) lead-free qfn-16 industrial 149a with pb-free bar-line indicator notes: 1. tape and reel. pin configuration 16-pin qfn ? (qfn-16) pin description pin number pin name pin function 1, 4 din, /din differential data input s. if ac-coupled, terminate each pin to v ref with 50 ? . 2 vref reference voltage output. typically v cc C 1.3v. 3, 11, 8 gnd device ground. exposed pad must be soldered (o r equivalent) to the same potential as the ground pins. 10 /auto reset lvttl input. this pin is internally connected to a 25k ? pull-up resistor and defaults to high. when this pin is low or tied to ground, the /a uto reset function is enabled and sd deasserts or los asserts within 120ns (typical) after the la st high-to-low transition of the burst input. when this pin is left floating or tied high, the auto reset function is disabled and the sd deassert or los assert must be forced by usi ng the manual reset function. 5, 16 vcc positive power supply. bypass with 0.1uf | | 0.01uf low esr capacitor s. 0.01uf capacitors should be as close as possible to vcc pins. 6 reset lvttl input. apply a high-level signal ( > 2v) to this pin to reset t he sd deassert time or los assert within 5ns. reset defaults to low if left floating. if the /auto reset function is not used, this reset function needs to be used to qui ckly deassert the sd or assert los. this pin is internally connected to a 25k ? pull-down resistor and defaults to low. or (408) 955-1690 downloaded from: http:///
micrel, inc. sy88149hal july 2011 3 m9999-072511-a hbwhelp@micrel.com or (408) 955-1690 pin description (continued) pin number pin name pin function 7 los/sd lvttl output. signal detect (sd) asserts high when the data input amplitude rises above the threshold sets by sd lvl . conversely, loss-of-signal (los) deasserts low when the data input amplitude rises above the threshold set by los lvl . 12, 9 dout, /dout lvpecl outputs. when jam disables the devi ce, output dout is forced to logic low and output /dout is forced to logic high. 13 los/sd sel allows the user to select between whether los or sd is outputted on the los/sd pin. also controls the polarity of the jam input. when sd is selected, jam is active high and los/sd (pin 7) operates as signal detect. conversely , when los is selected, jam is active low and los/sd operates as loss-of-signal. this pin is internally connected to a 25k ? pull-up resistor and defaults to high (sd output selected). 14 los/sdlvl voltage input. sets the los/sd level. a resistor from this pin to v cc sets the threshold for the data input amplitude at which los/sd will be asserted. 15 jam lvttl input. this jam input acts as a squelch function and switches its polarity depending on los/sd sel status. when los is selected, this pi n is active low. when sd is selected, this pin is active high. to create a squelch functi on, connect jam to los/sd. when jam disables the device, output q is forced to logic low and out put /q is forced to logic high. note that this input is internally connected to a 25k ? pull-up resistor. downloaded from: http:///
micrel, inc. sy88149hal july 2011 4 m9999-072511-a hbwhelp@micrel.com or (408) 955-1690 absolute maximum ratings (1) supply voltage (v cc )....................................... 0v to +4.0v input voltage (din , /din) .......................................0 to v cc output current (i out ) continuou s........................................................ 50ma surge .............................................................. 100ma en voltage .............................................................0 to v cc v ref current .......................................... -800 a to +500 a sd lvl voltage ....................................................v ref to v cc lead temperature (soldering, 20s ).......................... 260c storage temperature (t s ) ....................... C65c to +150c operating ratings (2) supply voltage (v cc )................................. +3.0v to +3.6v ambient temperature (t a ).......................C40c to +85c junction temperature (t j ) .....................C40c to +125c junction thermal resistance (3) qfn ? ( ja ) still-air ...........................................60c/w qfn ? ( jb ) junction-to- board .........................38c/w dc electrical characteristics v cc = 3.0 to 3.6v; t a = C40c to +85c, typical values at v cc = 3.3v, t a = 25c. symbol parameter condition min. typ. max. units i cc power supply current no output load 58 80 ma los/sd lvl los/sd lvl voltage v ref v cc v v oh lvpecl output high voltage 50 ? to v cc ? 2v v cc ? 1.085 v cc ? 0.955 v cc ? 0.880 v v ol lvpecl output low voltage 50 ? to v cc ? 2v v cc ? 1.830 v cc ? 1.705 v cc ? 1.555 v i offset input offset voltage 1 mv v ihcmr common mode range note 4 gnd + 1.4 v cc v v ref reference voltage v cc ? 1.48 v cc ? 1.32 v cc ? 1.16 v i din input sink current (din & /din) no input load 6 ua lvttl dc electrical characteristics v cc = 3.0 to 3.6v; t a = C40c to +85c, typical values at v cc = 3.3v, t a = 25c. symbol parameter condition min. typ. max. units v ih lvttl input high voltage 2.0 v v il lvttl input low voltage 0.8 v i ih_jam jam input high current v in = v cc v in = 2.7v 20 20 a i il_jam jam input low current v in = 0.5v ? 0.3 ma i ih_ar /autoreset input high current v in = v cc v in = 2.7v 100 20 a i il_ar /autoreset input low current v in = 0.5v ? 0.3 ma notes: 1. permanent device damage may occur if absolute maximum ratings are exceeded. this is a stress rating only and functional oper ation is not implied at conditions other than those detailed in the operational sections of this data shee t. exposure to absolute maximum rating con ditions for extended periods may affect device reliability. 2. the data sheet limits are not guaranteed if t he device is operated beyond the operating ratings. 3. thermal performance assumes the use of a 4-layer pcb. ex posed pad must be soldered to the devices most negative potential o n the pcb. 4. vihcmr is defined as common mode range of the vih level on din and /din. it is the most positive level of the differential s ignal. downloaded from: http:///
micrel, inc. sy88149hal july 2011 5 m9999-072511-a hbwhelp@micrel.com or (408) 955-1690 lvttl dc electrical characteristics (continued) v cc = 3.0 to 3.6v; t a = C40c to +85c, typical values at v cc = 3.3v, t a = 25c. symbol parameter condition min. typ. max. units i ih_reset reset input high current v in = v cc v in = 2.7v 300 250 a i il_reset reset input low current v in = 0.5v 0 ma v oh sd/los output high level i oh = ? 100ua 2.1 2.7 v v ol sd/los output low level i ol = 100ua 0.35 0.5 v ac electrical characteristics v cc = 3.0v to 3.6v; r load = 50 ? to v cc C 2v; t a = C40c to +85c. symbol parameter condition min. typ. max. units t r , t f output rise/fall time (20% to 80%) note 5 260 ps t jam jam enable/disable time 2 ns t autoreset sd deassert or los a ssert with auto reset enabled. 100 120 150 ns t reset reset time constant note 6 5 ns t on sd assert time/los deassert time 5 ns t jitter deterministic random note 7 note 8 15 5 ps pp ps rms v id differential input voltage swing figure 1 5 1800 mv pp v od differential output voltage swing v id 18mv pp 1500 mv pp sd al /los dl low sd assert/los de- assert level r los/sdlvl = 10k ? , note 9, 10 4 mv pp sd dl/ /los al low sd deassert /los assert level r los/sdlvl = 10k ? , note 10 3 mv pp hys l low sd/los hysteresis r los/sdlvl = 10k ? , note 11 2.5 db sd am /los dm medium sd assert/los deassert level r los/sdlvl = 5k ? , note 10 4.76 mv pp sd dm /los am medium sd deassert /los assert level r los/sdlvl = 5k ? , note 10 3.6 mv pp hys m medium sd/los hysteresis r los/sdlvl = 5k ? , note 11 2 3 4 db sd ah /los dh high sd assert/los de- assert level r los/sdlvl = 50 ? , note 10 18 mv pp sd dh /los ah high sd deassert/ los assert level r los/sdlvl = 50 ? , note 10 12.5 mv pp hys h high sd/los hysteresis r los/sdlvl = 50 ? , note 11 2 3 4 db b -3db 3db bandwidth 750 mhz a v(diff) differential voltage gain 48 db s 21 single-ended small-signal gain 42 db notes: 5. amplifier in limiting mode. input is a 200mhz square wave. 6. the time between applying reset and outputs being disabled. 7. deterministic jitter measured using 1.25gbps k28.7 pattern, v id = 10mv pp . 8. random jitter measured using 1.25gbps k28.7 pattern, v id = 10mv pp . 9. sd is the opposite polarity of los. therefore, an sd assert parameter is equivalent to a los deassert parameter and vice ver sa. 10. see typical operating characteristics for a graph showing how to choose a particular r los/sdlvl for a particular assert and its associated deassert amplitude. 11. this specification defines electrical hysteresis as 20log(sd assert/sd dea ssert). the ratio between optical hysteresis and electrical hysteresis is found to vary between 1.5 and 2 depending upon the level of received optical power and rosa characteristics. based upon that ra tio, the optical hysteresis corresponding to the el ectrical hysteresis range 3db ? 6db, shown in the ac char acteristics table, will be 1.5db-4db optical hysteresis. downloaded from: http:///
micrel, inc. sy88149hal july 2011 6 m9999-072511-a hbwhelp@micrel.com typical operating characteristics v cc = 3.3v, t a = 25c, r l = 50 ? to v cc C 2v, unless otherwise stated. los assert/de-assert levels 1 10 100 0.1 1 10 los/sdlvl resistor (kohm) signal amplitude (mv) los/sd hysteresis 1 2 3 4 5 6 0.1 1 10 los/sdlvl resistor (kohm) hysteresis (db) or (408) 955-1690 downloaded from: http:///
micrel, inc. sy88149hal july 2011 7 m9999-072511-a hbwhelp@micrel.com functional block diagram or (408) 955-1690 downloaded from: http:///
micrel, inc. sy88149hal july 2011 8 m9999-072511-a hbwhelp@micrel.com or (408) 955-1690 detailed description the sy88149hal is a high-sensitivity limiting post amplifier which operates on a +3.3v power supply over the industrial temperature range. signals with data rates up to 1.25gbps and as small as 5mvpp can be amplified. depending on the los/sd sel option, the sy88149hal can generate an sd or los output, and allow feedback to the jam input for output stability. los/sd lvl sets the sensitivity of the input amplitude detection. to satisfy the stringent timing requirements of the gpon specifications, the signal detect circuit offers 5ns sd assert (los deassert) time and the option to deassert sd (assert los) using the /auto reset or manual reset function. when /auto reset is enabled, sd deasserts/los asserts automatically within 120ns after the last high-to- low transition of the input burst. when the /autoreset function is disabled, the sd deassert/los assert time can be reset by using the provided reset pin. input buffer figure 2 shows a simplified schematic of the input stage. the high sensitivity of the input amplifier allows signals as small as 5mvpp to be detected and amplified. the input buffer can allow input signals as large as 1800mv pp . input signals are linearly amplifi ed with a typically 48db differential voltage gain un til the outputs reach 1500mv pp (typical). applications requiring the sy88149hal to operate with high-gain should have the upstream tia placed as close as possible to the sy88149hals input pins. this ensures the best performance of the device. output buffer the sy88149hals lvpecl output buffer is designed to drive 50 ? lines. the output buffer requires appropriate termination for proper operation. an external 50 ? resistor to v cc C 2v for each output pin provides this. figure 3 shows a simplified schematic of the output stage. loss of signal/signal detect the sy88149hal generates a chatter-free signal-detect (sd) or los lvttl output, as shown in figure 4. a highly-sensitive signal detect circuit is used to determine that the input amplitude is too small to be considered a valid input. los asserts high if the input amplitude falls below the threshold sets by los/sdlvl and deasserts low otherwise. sd asserts high if the input amplitude rises above threshold set by los/sdlvl and deasserts low otherwise. los/sd can be fed back to the jam input to maintain output stability under the absence of an invalid signal condition. typically, a 3db hysteresis is provided to prevent chattering. los/sd level set a programmable los/sd level pin (los/sd lvl ) sets the threshold of the input amplitude detection. connecting an external resistor between v cc and los/sd lvl sets the voltage at los/sd lvl . this voltage ranges from v cc to v ref . the external resistor creates a voltage divider between v cc and v ref , as shown in figure 5. set the los/sd lvl voltage closer to v ref or more sensitive los/sd detection or closer to v cc for higher inputs. downloaded from: http:///
micrel, inc. sy88149hal july 2011 9 m9999-072511-a hbwhelp@micrel.com timing diagrams no manual reset and /autoreset tied high no manual reset and /autoreset tied low manual reset and /autoreset tied high or low or (408) 955-1690 downloaded from: http:///
micrel, inc. sy88149hal july 2011 10 m9999-072511-a hbwhelp@micrel.com figure 1. vis and vid definition figure 2. input structure figure 3. output structure figure 4. sd output structure figure 5. los/sd lvl setting circuit or (408) 955-1690 downloaded from: http:///
micrel, inc. sy88149hal july 2011 11 m9999-072511-a hbwhelp@micrel.com package information 16-pin qfn ? (qfn-16) micrel, inc. 2180 fortune drive san jose, ca 95131 usa tel +1 (408) 944-0800 fax +1 (408) 474-1000 web http://www.micrel.com micrel makes no representations or warranties with respect to t he accuracy or completeness of the information furnished in this data sheet. this information is not intended as a warranty and micrel does not assume responsibility for it s use. micrel reserves the right to change circuitry, specifications and descriptions at any time without notice. no license, whether expre ss, implied, arising by estoppel or other wise, to any intellectual property rights is granted by this document. except as provided in micrels terms and conditions of sale for such products, mi crel assumes no liability whatsoever, and micrel disclaims any express or implied warranty relating to the sale and/or use of micrel products including l iability or warranties relating to fitness for a particular purpose, merchantability, or infringement of an y patent, copyright or other intellectual p roperty right. micrel products are not designed or authori zed for use as components in life support app liances, devices or systems where malfu nction of a product reasonably be expected to result in pers onal injury. life support devices or system s are devices or systems that (a) are in tended for surgical impla into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significan t injury to the user. a purchasers use or sale of micrel produc ts for use in life support app liances, devices or systems is a purchasers own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. can nt ? 2011 micrel, incorporated. or (408) 955-1690 downloaded from: http:///

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